Metallization is the process that forms the interconnections of the components on an integrated circuit (IC). This can be accomplished by the deposition of a thin layer of a metal over the entire surface of the IC and then etched in a desired pattern. Until recently, the metal has commonly been aluminum, because dry etch processes are available for aluminum. Since the development of chemical mechanical polishing (CMP) techniques for the more conductive copper, damascene processing is rapidly gaining in acceptance. In damascene processes, a thick dielectric layer is patterned with trenches and/or vias, metal is blanket deposited over the substrate and into the openings, and excess metal is polished away from the top surfaces of the dielectric. This leaves metal inlaid within the trenches and/or vias. In order for the metal, typically copper, to be properly laid there must be an appropriate surface for the copper to adhere to. Copper can be deposited by chemical vapor deposition (CVD) or plating, but in either case a suitable seed layer is typically formed lining the openings prior to bulk copper deposition.
Because of its high electrical conductivity and good electromigration properties, copper, rather than aluminum, is preferred in modern integrated circuits. Ohmic losses of the conductors are decreased because copper has a much higher conductivity than aluminum. The lower resistance and the associated ohmic losses are beneficial in photovoltaic applications in addition to analog and digital microcircuits and microprocessors. Copper-metallized microcircuits can accommodate higher currents because of copper's higher resistance to electromigration. Additionally, copper's properties allow the use of narrower and thinner conductors and interconnections. Furthermore, since tighter packing density can be obtained with copper, fewer metallization levels are typically needed for equivalent circuit designs using copper interconnects and, thus, the manufacturing costs can be lower than with aluminum.
However, copper's benefits are also balanced by some problems. A major problem associated with using copper is that it diffuses readily in common insulating materials. Therefore, great care has to be taken in order to prevent direct contact between copper and typical silicon oxide-based insulating layers. If this were to occur in an IC, it would cause short circuits. In order to prevent such diffusion, a barrier layer is generally introduced between the insulator and copper. This barrier layer, called a diffusion barrier, is deposited over the insulator surface before copper deposition, or over copper lines prior to insulator deposition. Some examples of relatively conductive barrier layers include tungsten, molybdenum, and titanium compounds, such as nitrides and carbides.
The atomic layer deposition (ALD) method of depositing thin films, such as diffusion barriers, has several attractive features including excellent step coverage, even on large areas, and a dense and pinhole-free structure. Therefore, it is also of great interest to apply ALD to the deposition of metallization layers of advanced integrated circuits (ICs), where the continuously increasing packing density and trench/via aspect ratios set higher demands upon the metallization layers. Applications where high quality metallization is particularly needed are dual damascene structures, gates in transistors and capacitor electrodes in ICs. However, due to the fact that ALD is based on sequential self-saturating surface reactions of source chemical compounds, depositing high quality elemental metal thin films by ALD is very difficult.
Metal oxide thin films produced by ALD, on the other hand, can be very uniform, have excellent adhesion and thus can be firmly bonded to the substrate surface. ALD metal oxide thin films can be used to make conductive thin films through oxidation state reduction after deposition of a metal oxide thin film. For example, Soininen et al., used an ALD deposited metal oxide thin film in order to produce a conductive thin film. (U.S. Pat. No. 6,482,740). After the ALD metal oxide thin film was produced, it was reduced by using organic compounds with at least one of the following functional groups: —OH, CHO, and —COOH, thus producing a metal thin film layer. Films of this process include both metal and conductive metal oxide films from various elements, including cobalt, copper, gold, nickel, osmium, platinum, rhenium, ruthenium, and silver.
One of the most advanced IC structures is the dual damascene structure over a semiconductor substrate with transistors (including source, gate and drain). Several electrically conducting layers are needed in the structure. The first metallization level is conventionally fabricated with tungsten plugs and aluminum interconnects to prevent the contamination of the gate with copper. The remainder of the metallization levels are preferably made of copper.
Metallization of the trenches and vias can be attained by copper electroplating. Alternatives are electroless plating, physical vapor deposition (PVD), and CVD. A seed layer, usually deposited by CVD or PVD, is typically needed for electroplating processes. In the electroplating process the substrate having an electrically conductive seed layer is immersed in a metal compound solution. The electrically conductive surface of the substrate and an opposing electrode are connected to an external DC power supply. A current passes through the substrate surface into the solution and metal is deposited on the substrate. The seed layer has high conductivity and it acts as a conduction and nucleation layer for the electroplating process. A first seed layer can also act as a nucleation layer for the CVD process that forms a subsequent electroplating seed layer. The electroplating seed layer carries current from the edge of the wafer to the center of the wafer and from the top surface of the wafer into the bottom of vias and trenches, so it must be conductive. A uniform and continuous seed layer is desirable to produce uniform electroplated copper. The quantity of the deposited metal is directly proportional to the local current density on the substrate.
It has been complicated to form a sufficiently uniform copper seed layer on a diffusion barrier in high aspect ratio trenches and vias. For example, in the process of U.S. Pat. No. 6,482,740, the process window of ALD-grown copper oxide is rather narrow. In that process, copper oxide is reduced into elemental copper metal in a subsequent process step. Direct growth of elemental copper using ALD chemistry is also rather complicated, and it can contaminate the ALD reactor chamber. Other materials have been tried in place of a copper seed layer. Copper will grow evenly on these non-copper seed layers, but there are drawbacks to these chemicals as well. For example, ruthenium makes an excellent seed layer. Additionally, it will bond well to the surface of a barrier layer such as tungsten nitride carbide (WNxCy, wherein x and y denote a range of chemical compositions including non-stoichiometric compounds). However, the growth of a ruthenium seed layer can itself be a very time consuming process, as the incubation or nucleation period of the ruthenium is quite long.
It is accordingly an objective of the present invention to avoid these and other disadvantages and to facilitate the process of metallizing dual damascene structures. There is a need for better and more efficient seed layers for the deposition of metals for the purpose of metallizing ICs.